PCI (Peripheral Component Interconnect Standard) Overview

PCI, or Peripheral Component Interconnection, is a standard introduced by Intel in 1991 to define a local bus. This standard allows up to ten PCI‑compliant expansion cards to be installed in a computer. The original PCI bus operated at 33 MHz, with a data transfer rate of 133 MB/s (33 MHz × 32 bits), which largely met the performance demands of processors at the time. As higher performance became necessary, a 64‑bit PCI bus was introduced in 1993, followed by an increase in the bus frequency to 66 MHz. Currently (note: this article was written relatively early), the 32‑bit, 33 MHz PCI bus remains widely used, while 64‑bit PCI slots are more commonly found in server products.From a structural standpoint, PCI is a first-level bus inserted between the CPU and the original system bus. A bridge circuit specifically manages this layer and provides interfaces between the upper and lower levels to coordinate data transfer. The controller offers signal buffering, enabling high performance at high clock frequencies, while also providing connection interfaces for devices such as graphics cards, sound cards, network cards, and modems, operating at clock speeds of 33 MHz or 66 MHz.

The PCI bus system requires a PCI controller card, which must be installed in a PCI slot. This type of slot is currently the most common on motherboards; on today’s popular desktop motherboards, ATX‑based boards typically feature 5 to 6 PCI slots, while smaller micro‑ATX boards usually include 2 to 3 PCI slots. Depending on the implementation, the PCI controller can exchange either 32‑bit or 64‑bit data with the CPU at a time, enabling intelligent PCI add‑on adapters to perform tasks in parallel with the CPU using a bus‑mastering technique. PCI supports multiplexing, allowing more than one electrical signal to exist on the bus simultaneously.

With a bandwidth of only 133 MB/s, the PCI bus is more than sufficient for most input/output devices such as sound cards, network cards, and video cards. However, it can no longer meet the demands of increasingly powerful graphics cards. At Intel’s IDF in spring 2001, Intel officially unveiled its third-generation I/O technology, designed to replace the PCI bus. This specification was developed by the AWG (Arapahoe Working Group), which is supported by Intel. On April 17, 2002, the AWG formally announced that the draft of the 3GIO 1.0 specification had been completed and handed over to the PCI‑SIG (PCI Special Interest Group) for review. Initially, many assumed it would be named Serial PCI—due to the influence of Serial ATA—but it was ultimately officially designated PCI Express, with “Express” conveying the idea of high speed and exceptional performance.

On July 23, 2002, PCI-SIG officially released the PCI Express 1.0 specification and, in early 2007, introduced the 2.0 specification (Spec 2.0), increasing the data transfer rate from 2.5 GB/s in PCI Express 1.1 to 5 GB/s.